1. Field of the Invention
The present invention relates generally to a reversible computer apparatus having a unique architecture, including appropriate microprocessor hardware and programming, which is capable of executing instructions not only in a standard forward execution mode, but also in a reverse execution mode. More particularly, the invention provides reversible execution which may be implemented at the machine language level, relying on an internal stack in micromemory or the microprocessor's stack pointer register for data saving purposes, i.e., whereby a value normally overwritten during forward execution may be saved on an internal stack associated with instruction decoding for use in reverse execution mode when desired.
The invention also contemplates a unique instruction set design in which for every forward-mode instruction there is an essentially opposite, complementary reverse-mode instruction. The complementary reverse-mode instructions are used in the reverse execution mode, following a logical flow which is essentially the reverse of that used during forward execution mode. When one or more pairs of complementary forward- and reverse- mode instructions are executed, the internal state of the computer is left substantially intact.
The terminology "internal state" as employed herein is intended to refer to the various internal elements of a computer, including the microprocessor registers, memory, and secondary storage contents affecting computations.
The terminology "stack" as employed herein is intended to connote an internal stack in micromemory created by suitable programming, such as a Turbo Pascal dynamic stack. Alternatively, a stack may be simulated by implementing the microprocessor's stack pointer register with PSH (push data into stack) and POP (pop data from top of stack) instructions in the machine design, for example.
2. Description of the Relevant Art
A major problem caused by software failures is the loss of data which has been input but not yet stored in memory. A user operating the computer system may have to spend many frustrating hours inputting data to return the system to the state it was in just prior to the crash. Similar difficulties arise when, for example, the hard disk unit on a personal computer is repartitioned and all data is inadvertently lost, or when other similar inadvertent destructive operations occur.
If a computer system were capable of operating in reverse, it would be possible for the system to return itself to the state it was in just prior to a software failure or other destructive operation resulting in data loss. Reversible execution would also permit diagnosis of any unexpected input which may have caused a software failure. While a full reverse execution mode has not heretofore been attainable, efforts have been made to permit limited opposite-mode execution in the form of "undo" or "redo" previous command features. Examples of such undo or redo previous commands include the UNIX visual text editor's undo (ESC u) feature, Korn Shell's previous history feature, and the VMS "arrow back" and "arrow forward" features. Although such known features demonstrate the desirability of having the system operate in an opposite direction, they are of limited utility inasmuch as they permit going back only one step or one line.
It has been suggested that reverse computations may be capable of being performed at the level of logic gates, i.e., Fredkin gates, and that reversible Turing machines may be feasible. See Bennett, C. H. and Landauer, R. "The Fundamental Physical Limits of Computation," Scientific American, Vol. 253 (July 1985). At the other extreme, it has been suggested that reversible programs and procedures may be attainable with higher symbolic language levels. See Briggs, J. S., "Generating Reversible Programs," Software--Practice and Experience, Vol. 17 (7), (July 1985). This latter work discusses undoing actions, as well as the possibility of perfectly invertible procedures which are suitable for functions having meaningful logical opposites.
Other known microprocessor and/or computer control systems, while not disclosing or suggesting the reversible execution features of the present invention, are described in the following United States patents. U.S. Pat. No. 4,434,461 issued in 1984 to Puhl entitled "Microprocessor with Duplicate Registers for Processing Interrupts" discloses a microprocessor architecture for controlling cellular radiotelephone transceivers, including duplicate microprocessor registers which are switched over to during interrupts. U.S. Pat. No. 4,910,660 issued in 1990 to Li entitled "Self-Optimizing Method and Machine" discloses a method for self-optimizing an object relative to a specific criterion in response to variations on a number of variables, in which statistically designed tests are performed to determine the combination of variables optimizing the specific criterion in repeating optimizing cycles. U.S. Pat. No. 5,006,992 issued in 1991 to Skeirik entitled "Process Control System with Reconfigurable Expert Rules and Control Modules" discloses a process control system having a supervisor procedure configured as a modular software structure which defines control parameters for various process control procedures and retrieves data from various sources including a historical database.
The present invention provides a computer apparatus having an underlying machine architecture capable of full reverse execution of instructions, in which operations are concretely defined at the machine language level.